TSMC Begins Construction of 1.4nm Facility in Taiwan by 2025, Won’t Utilize ASML’s High-NA EUV Technology for This Process

TSMC is gearing up to initiate production of 2nm wafers by the close of 2025. However, the largest semiconductor producer in the globe is already setting its sights on an even more advanced manufacturing technique—1.4nm technology, also referred to as A14. Recent reports indicate that TSMC will begin foundational work on 1.4nm wafer manufacturing within Taiwan. Notably, the company seems set to bypass ASML’s recently developed and prohibitively expensive High-NA EUV lithography equipment.

TSMC’s Innovative Approach: Utilizing Multi-Patterning Techniques Over High-NA EUV

According to Commercial Times, the construction of a new 1.4nm fabrication facility in Taichung is anticipated to break ground by year-end, yet mass production might not commence until the latter half of 2028. TSMC had previously outlined this timeline and stated that its A14 process could lead to a reduction of power consumption by up to 30%.

Research and development for the 1.4nm process will take place at TSMC’s existing facility in Hsinchu. The company is already in the recruitment phase at the Taichung site, with construction permits for three new buildings having been approved as of August. To realize these ambitious plans, TSMC’s initial investment is likely to exceed NT$1.5 trillion, approximately equivalent to $49 billion, significantly earmarking funds for the purchase of 30 EUV lithography machines anticipated in 2027.

As reported by Dan Nystedt on X, TSMC’s decision not to pursue ASML’s High-NA EUV systems likely stems from the staggering cost of these machines, which are valued at around $400 million each. This pricing poses a substantial financial challenge. TSMC has assertively stated that its current infrastructure is capable of facilitating mass production of 1.4nm wafers, opting instead for intricate multi-patterning methods, much like those employed by SMIC in their 5nm processes.

While TSMC’s chosen alternative carries certain drawbacks, such as the potential for increased time and costs associated with yield optimization, the company is prepared to embark on a ‘trial and error’ pathway to refine its 1.4nm manufacturing process. The key distinction between TSMC and its competitor SMIC is that TSMC possesses specialized EUV resources which will aid in this endeavor. Given that mass production is still a few years away, TSMC has ample opportunity to enhance and optimize this cutting-edge technology.

News Source: Commercial Times

Source & Images