SMIC Expected to Finish 5nm Chip Development by 2025; Production Costs May Exceed TSMC’s by 50% Due to Aging Equipment

Recent reports indicate that Semiconductor Manufacturing International Corporation (SMIC) has encountered several challenges in its pursuit of advanced chip production, particularly due to its lack of access to cutting-edge Extreme Ultraviolet (EUV) lithography equipment. This limitation has hindered the company’s efforts to advance beyond the 7nm technology node. According to projections, SMIC is on track to conclude its 5nm chip development in 2025.

Challenges Using DUV Equipment

Utilizing older Deep Ultraviolet (DUV) lithography tools may enable SMIC to reach its 5nm targets. However, this approach comes with significant drawbacks. Notably, the costs associated with production are expected to be 50% higher than those of rival TSMC for comparable manufacturing processes. Moreover, yields for SMIC’s chips are projected to be only one-third of what TSMC achieves with the same technology.

A report from Kiwoom Securities, highlighted by tipster @Jukanlosreve, underscores the anticipated completion timeline for SMIC’s 5nm chips. The company faced roadblocks during the fabrication of these advanced nodes, particularly in relation to the mass production of Huawei’s Mate 70 series featuring the Kirin 9020 built on a 7nm node. If SMIC manages to fulfill its ambitious objectives, it could still face a multitude of challenges along the way.

As indicated, SMIC’s 5nm wafers are projected to incur steep costs due to reliance on the older DUV technology, which necessitates additional patterning to achieve the desired lithography precision. The increased price point and lower yields combine to create a formidable barrier for SMIC as it seeks to compete in the rapidly evolving semiconductor landscape.

SMIC plans to complete the development of its 5nm process by 2025.

They achieved mass production of the 7nm (N+2) process without EUV and completed the development of the 5nm process to support the mass production of the Huawei Ascend 910C.

The cost of SMIC’s 5nm process is…

— Jukanlosreve (@Jukanlosreve) March 26, 2025

Future Prospects and Hurdles

Additional manufacturing steps introduced due to the limitations of DUV technology will not only lead to longer production times for 5nm wafers but are also likely to result in a higher incidence of defective products. A pivotal factor will be whether SMIC can develop its own EUV technology, which is currently in trial production stages and expected to become operational in Q3 2025. Additionally, SiCarrier, a Chinese equipment manufacturer linked to Huawei, is actively exploring alternatives to ASML’s technology, which may aid in overcoming these limitations.

While the exact timeline for increased production of SMIC’s 5nm wafers remains unclear, @Jukanlosreve notes that Huawei plans to leverage this technology in its Ascend 910C AI chip. This initiative aims to decrease China’s reliance on NVIDIA’s offerings. The successful development of local EUV machinery could enable SMIC to pursue even more advanced semiconductor technology nodes in the future. We will provide updates on SMIC’s progress with the 5nm process in the coming weeks.

News Source: @Jukanlosreve

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