Samsung Electronics VP Highlights Limitations of Process Miniaturization, Advocating for Innovative Solutions Beyond 10-15% Improvements

Samsung’s introduction of its 2nm Gate-All-Around (GAA) technology signifies a promising leap in semiconductor manufacturing. While the advancements associated with this process are notable, Samsung’s Foundry Vice President, Shin Jong-shin, cautions that simply shrinking technology nodes yields diminishing returns. Consequently, he advocates for exploring alternative approaches, notably through a methodology dubbed Design and Process Integration Optimization (DTCO), aimed at discovering modifications that enhance the efficacy of these advanced nodes.

Enhancements in Structure Transition: From FinFET to GAA

During a recent seminar, the eighth Semiconductor Industry-Academia-Research Exchange Workshop in Seoul, Shin Jong-shin elaborated on the industry’s evolving focus towards DTCO. Both Samsung and its competitor TSMC have established specialized teams to pursue simultaneous improvements in design and processing techniques.

“Now, process miniaturization alone can only lead to improvements of 10-15%.As process performance improvement reaches its limits, the industry is paying attention to DTCO. At 7nm, approximately 10% of the overall performance improvement is due to DTCO. We expect that share to reach 50% at 3nm and below. Both Samsung and TSMC have dedicated DTCO teams and are pursuing simultaneous design and process improvements.”

According to insights shared by The Elec, DTCO allows engineers to reconsider existing process constraints while aligning design changes as requested by clients like Tesla. Samsung’s transition from FinFET to GAA structures began with its 3nm technology; however, initial yields were subpar. In contrast, early results from the 2nm node show encouraging potential.

“When going from N node to M node, the performance improvement is about 15%, and the area reduction is also about 15%.Unlike the artificial intelligence (AI) field where performance doubles every few months, in the world of semiconductor processing, even a 1-2% difference is very important. A 1-2% performance difference can become a criterion for process selection.”

In its pursuit of further innovations, Samsung is also harnessing artificial intelligence to automatically generate new cell configurations that promote smaller area footprints and improved energy efficiency. Samsung’s findings are expected to broaden the scope of DTCO into System-Process Co-Optimization (SPCO) and System-Design-Process Co-Optimization (SDTCO), further enhancing overall process refinement.

Reports indicate that Samsung has successfully finalized the foundational design of its second-generation 2nm GAA technology, with plans to roll out its third iteration, designated SF2P+, within the next two years. This strategic emphasis on advancing the 2nm GAA process may explain the company’s decision to postpone its 1.4nm node, prioritizing enhancements over direct competition with industry leader TSMC.

For further reading, refer to The Elec.

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