
The Tensor G4 is expected to be the last chipset created through Samsung’s fabrication processes for Google. As part of a strategic shift, Google is forging closer ties with TSMC, positioning itself to enhance the competitive edge of its Pixel smartphones and tablets against rival offerings. Recent reports suggest that executives from Google made a trip to Taiwan, exploring a partnership with TSMC that could span anywhere from three to five years. The upcoming Tensor G5 is anticipated to debut later this year, manufactured using the advanced 3nm technology.
Strategic Partnership: Google and TSMC’s Impact on Future Pixels
This new collaboration enables Google to implement Tensor System-on-Chips (SoCs) that leverage TSMC’s cutting-edge fabrication technology, potentially extending through the Pixel 14 series. Samsung’s ongoing difficulties with the yield rates for their 3nm Gate-All-Around (GAA) technology would lead to significant delays for Google’s Tensor G5 shipments, in addition to incurring inflated costs. To remain competitive in the fast-paced tech market, Google is adopting a strategy prevalent among major technology firms: aligning with TSMC as their semiconductor supplier.
With the Pixel 10 series set to launch in the fourth quarter of 2025, DigiTimes indicates that Google’s leadership is actively working to solidify their collaboration with TSMC, instigating a contract that may last close to five years. It is highly probable that post-contract, Google will opt for renewal, given TSMC’s dominant technological position in the industry.
In a related development back in April, it was highlighted that TSMC commenced orders for its 2nm wafers, underscoring its substantial lead in semiconductor technology. Industry titans such as Qualcomm, MediaTek, and Apple are expected to utilize TSMC’s third-generation 3nm fabrication process, known as ‘N3P, ’ for their chipsets, while many are eying the transition to the 2nm node by 2026.
Though Google appears to be one generation behind with the Tensor G5 being produced on the second-generation 3nm process, modifications can potentially enhance its performance and efficiency metrics to rival other leading SoCs. As we anticipate future announcements, we’ll keep our audience updated with the latest developments in this evolving relationship.
News Source: DigiTimes
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