Recent disclosures regarding Intel’s Nova Lake-S “bLLC”cache configurations have illuminated exciting developments for the upcoming desktop CPUs, which will feature an impressive maximum cache of 288 MB.
Intel Nova Lake-S: Desktop CPUs with Up to 288 MB bLLC Cache, Exceeding 9950X3D2 by 80 MB
The latest insights into Intel’s Nova Lake-S CPUs have emerged, specifically highlighting the bLLC configurations. Industry insider Jaykihn has provided a detailed overview, indicating that bLLC (Big Last Level Cache) variants will offer up to 144 MB for single tile configurations and 288 MB for dual tile setups, showcasing the strategic enhancements in cache capacity across the lineup.

Intel’s Nova Lake Desktop CPUs are structured around five core dies, encompassing both single and dual compute tile configurations. The dual tile variants, designated as “DS, ”are intended for the high-performance enthusiast segment.

The entry-level die configuration features an 8-core design consisting of 4 P-Cores and 4 LPE Cores. Following that, a 16-core configuration offers 4 P-Cores, 8 E-Cores, and 4 LPE Cores. Additionally, there are two distinct 28-core configurations, both featuring 8 P-Cores and 16 E-Cores alongside 4 LPE Cores; one of these incorporates the bLLC variant aimed at competing with AMD’s X3D CPUs—albeit without using the same die stacking technology.
For the dual compute tile models (“DS”), Intel provides a single 52-core configuration, comprising two dies outfitted with 8 P-Cores and 16 E-Cores—all retaining the same 4 LPE cores, which remain unaffected as they reside off the compute tile.
Intel’s prior reports confirm that single compute tile “bLLC”models will accommodate 144 MB cache, while their dual counterparts will reach up to 288 MB. In terms of physical dimensions, the standard compute tile measures 98 mm², while the bLLC variant expands to 154 mm².
Intel Nova Lake-S Desktop CPU: Die Configurations
| Die Config | Variant | Core Config | LPE Cores | Cache | CPU PCIe Lanes | GPU Cores |
|---|---|---|---|---|---|---|
| 8C | Single Compute Tile | 4P+0E | 4LPE | Standard | 24 Gen5 | 2 Xe3 |
| 16C | Single Compute Tile | 4P+8E | 4LPE | Standard | 24 Gen5 | 2 Xe3 |
| 28C | Single Compute Tile | 8P+16E | 4LPE | Standard | 24 Gen5 | 2 Xe3 |
| 28C | Single Compute Tile | 8P+16E | 4LPE | bLLC “Big LLC” | 24 Gen5 | 2 Xe3 |
| 52C | Dual Compute Tile | 2x 8P+16E | 4LPE | bLLC “Big LLC” | 24 Gen5 | 2 Xe3 |
Moving towards the WeUs, Intel plans to utilize the newly discussed Nova Lake dies for its Core Ultra Series 4 Desktop lineup, which is slated to consist of at least 13 distinct models within the Core Ultra 3, 5, 7, and 9 families. Moreover, high-performance tiers are expected, incorporating both 52-core and 44-core models.
These enthusiast models will reportedly harbor a thermal design power (TDP) of up to 175W, while the remaining lineup will range from 35W to 125W. The entry-level Core Ultra 3 and 5 models will start with 35W TDPs, scaling up to 65W for power-unlocked variants. The standard configurations will feature a TDP of 125W, with some power-optimized models at 65W. An “F”variant will also be available lacking an integrated GPU (iGPU).All Intel Nova Lake CPUs are expected to include 2 Xe3 cores, with future plans for a higher-end iGPU in one of the upcoming variants.
Intel Nova Lake-S Desktop CPU WeUs (Preliminary Information)
| Model | Product ID | Cores | Core Config | Cache Layout | Total Cache | TDP/cTDP |
|---|---|---|---|---|---|---|
| Core Ultra X? | P3DX | 52 Cores | 2x 8P+16E+(4LPE) | bLLC “Big LLC” | 288 MB | 175W |
| Core Ultra X? | P2DX | 44 Cores | 2x 8P+12E+(4LPE) | bLLC “Big LLC” | 264 MB | 175W |
| Core Ultra 9 | P2D | 28 Cores | 8P+16E+4LPE | bLLC “Big LLC” | 144 MB | 125W |
| Core Ultra 9 | P2K | 28 Cores | 8P+16E+4LPE | Standard | 36 MB | 125W/65W |
| Core Ultra 9 | P2 | 22 Cores | 6P+12E+4LPE | bLLC “Big LLC” | 108 MB | 65W |
| Core Ultra 7 | P1D | 24 Cores | 8P+12E+4LPE | bLLC “Big LLC” | 132 MB | 125W |
| Core Ultra 7 | P1K | 24 Cores | 8P+12E+4LPE | Standard | 33 MB | 125W/65W |
| Core Ultra 7 | P1 | 16 Cores | 4P+8E+4LPE | Standard | 18 MB | 65W/35W |
| Core Ultra 5 | MS2K/MS2KF | 22 Cores | 6P+12E+4LPE | Standard | 27 MB | 125W/65W |
| Core Ultra 5 | MS2 | 12 Cores | 4P+4E+4LPE | Standard | 15 MB | 65W/35W |
| Core Ultra 5 | MS1 | 8 Cores | 4P+0E+4LPE | Standard | 12 MB | 65W/35W |
| Core Ultra 3 | T1 | 6 Cores | 2P+0E+4LPE | Standard | 6 MB | 65W/35W |
As reported by Jaykihn, several WeUs have been detailed, including both dual and single compute tile models. These notable WeUs and their respective maximum caches are:
- Core Ultra X (52 Cores) – 288 MB
- Core Ultra X (44 Cores) – 264 MB
- Core Ultra 9 (28 Cores) – 144 MB
- Core Ultra 7 (24 Cores) – 132 MB
- Core Ultra 9 (22 Cores) – 108 MB
These dual compute tile WeUs mark Intel’s strategic response to competing AMD’s dual 3D V-Cache offerings, specifically the Ryzen 9 9950X3D2, which launches next week with a cache of 208 MB. The 264 MB Nova Lake variant will provide an impressive 27% more cache, while the flagship 288 MB model provides a substantial 38% more. Furthermore, AMD is expected to enhance its cache configurations in future X3D CPUs, indicating a competitive landscape for desktop processors ahead.
This development sets the stage for a fierce competition between Intel and AMD as both manufacturers gear up to launch their next-generation CPUs. With Intel’s Nova Lake specifications hinting at a significant resurgence in their desktop offerings, AMD is likely preparing to respond vigorously with its upcoming Ryzen series.
The anticipation builds as we inch closer to the releases, with the potential for groundbreaking advancements in consumer desktop CPUs from both tech giants in 2026. This excitement is shared not only by hardware enthusiasts but also by budget-conscious consumers eager for improvements and innovations in the PC market.
Comparative Overview: AMD Olympic Ridge vs Intel Nova Lake-S
| CPUs | Intel Core Ultra 400 | AMD Ryzen 10000? |
|---|---|---|
| Family | Nova Lake-S | Olympic Ridge |
| Architecture | Coyote Cove (P-Core), Arctic Wolf (E/LP Core) | It was 6 |
| CPU Process | TSMC N2P | TSMC N2P |
| Core Count (Max) | 52 | 24 |
| Thread Count (Max) | 52 | 48 |
| Max P-Cores | 16 | 24 |
| Max E-Cores | 32 | N/A |
| Max LP-E Cores | 4 | N/A |
| Max Cache (L2+L3) | 160-320 MB | 96 MB L3 |
| Max bLLC Cache | 144-288 MB | 64 MB per stack? |
| DDR5 (1DPC 1R) | 8000 MT/s, CUDIMM – Yes | 7200 MT/s?, CUDIMM – Yes |
| PCIe 5.0 Lanes (Max) | 36 | TBD |
| PCIe 4.0 Lanes (Max) | 16 | TBD |
| Socket Support | LGA 1954 | AM5 |
| Max TDP (PL1) | 125-175W | 125W+ |
| Max Power | ~700W (Dual), ~350W (Single) | TBD |
| Launch | 2H 2026 | 2H 2026 |
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