TSMC Expected to Launch NVIDIA’s Advanced Rubin AI Chips by Year-End, as Jensen Huang Outpaces Competition

NVIDIA is set to unveil its next-generation Rubin architecture, anticipated to emerge from TSMC’s fabrication facilities in Q4 2025. This development indicates a swift advancement, with the new lineup expected to roll out merely six months after the previous iteration.

NVIDIA’s Rubin AI Architecture: A Comprehensive Redesign Offering Significant Performance Gains

Analyzing NVIDIA’s product lifecycle reveals the company’s unmatched position in the market. Recently, there has been a heightened focus on transitioning from the Blackwell Ultra GB300 server production to a new architectural framework. In a recent announcement, NVIDIA’s CEO Jensen Huang stated that six distinct Rubin chips are in the process of being developed at TSMC. According to analyst Dan Nystedt, it’s anticipated that fully operational Rubin chips may begin production by year-end, positioning them for deployment to customers shortly thereafter.

Nvidia Vera Rubin AI chips could roll off production lines by year end, fully packaged (complete), media report, noting they are now in TSMC fabs on 3nm (N3P) process lines, will use CoWoS-L packaging. Robin Ultra is being made for a square carrier, likely to use CoPoS advanced…

— Dan Nystedt (@dnystedt) August 29, 2025

The innovations associated with the Rubin architecture are remarkable, as it signifies NVIDIA’s most advanced efforts to date. The Vera Rubin platform is set to incorporate both new CPU and GPU designs, utilizing TSMC’s cutting-edge N3P process alongside CoWoS-L packaging. A noteworthy shift will be the implementation of chiplet-based designs in its AI architecture, positioning NVIDIA to compete more effectively against rivals such as AMD.

NVIDIA presentation showcasing Vera Rubin NVL144 and specs for 2026, including 88 Custom Arm Cores and 2 Reticle-Sized GPUs. — Image Credits: NVIDIA

The Rubin architecture’s I/O die will reportedly use TSMC’s N5B (5nm) process and will feature twelve 12-Hi HBM4 memory chips, all integrated via CoWoS-L packaging. Furthermore, the Vera CPUs will utilize both TSMC N3P and N3B, marking the first NVIDIA-ARM CPU to adopt a chiplet design. These advancements reflect a comprehensive overhaul across all functional areas of the architecture, leading to expectations of high demand similar to that witnessed during NVIDIA’s transition from Ampere to Hopper.

In its recent Q2 financial report, NVIDIA highlighted the burgeoning AI compute markets, which are projected to escalate into a $3 trillion to $4 trillion sector. Jensen Huang’s forecasts suggest that the Rubin architecture will play a pivotal role in this expansion. Notably, TSMC has its hands full with the demands of the Rubin project, managing the entire spectrum from semiconductor manufacturing to packaging. As NVIDIA navigates this AI surge, the Vera Rubin platform is expected to significantly enhance its competitive edge.

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