TSMC Aims to Increase SoIC Packaging Production by 2025; NVIDIA’s Rubin and Apple’s M5 SoCs to Utilize New Standard

NVIDIA is poised to launch its innovative Rubin AI architecture, which will feature the company’s inaugural use of SoIC (System-on-Integrated Chip) packaging. This advancement has sparked preparations at Apple and TSMC, indicating a significant shift in the semiconductor landscape.

Market Dynamics: TSMC’s Transition from CoWoS to SoIC

As Team Green unveils its Rubin architecture, we are on the brink of a transformative era in the technology market. NVIDIA aims to overhaul not just its design structure but also to incorporate cutting-edge components like HBM4 (High Bandwidth Memory 4).According to a report from Ctee, TSMC is rapidly constructing facilities in Taiwan to facilitate this shift, phasing out its current advanced packaging technology, CoWoS (Chip-on-Wafer-on-Substrate), in favor of SoIC. This strategic move comes as leading companies—including NVIDIA, AMD, and Apple—gear up to announce their next-generation products featuring this advanced design system.

Understanding SoIC: Revolutionizing Chip Integration

For those unfamiliar, SoIC is a state-of-the-art chip stacking technique that enables the integration of multiple chiplets within a single, highly efficient package. This revolutionary approach allows various components—such as CPUs, memory, and I/O—to be housed on a single die, enhancing the flexibility and optimization of chips tailored to specific applications. Notably, AMD has already implemented SoIC within its 3D V-Cache CPUs, wherein additional cache memory is stacked vertically above the processor die. NVIDIA and Apple seem set to adopt this lead as they develop their upcoming products.

TSMC 3D Fabric Integration — Image Credits: TSMC

NVIDIA’s Rubin Lineup: Features and Specifications

Starting with the Rubin lineup, the architecture is set to leverage SoIC design alongside functional HBM4 technology. The Vera Rubin NVL144 platform is anticipated to showcase the Rubin GPU featuring two reticle-sized chips—which promise a staggering performance of up to 50 PFLOPs of FP4 processing power and an impressive 288 GB of next-gen HBM4 memory. On the other hand, the NVL576 model will boast a Rubin Ultra GPU with four reticle-sized chips, projected to deliver an astonishing 100 PFLOPS of FP4 and a cumulative HBM4e capacity of 1 TB distributed across 16 HBM sites.

Apple’s Adoption of SoIC: Strategic Insights

TSMC recognizes the strategic importance of SoIC moving forward. Interestingly, one of its largest clients, Apple, has plans to incorporate SoIC packaging in its next-generation M5 chip, which is expected to work in conjunction with Apple’s proprietary AI servers. While specific details regarding the M5 chip remain scarce, it is clear that this technology will play a crucial role in upcoming iterations of iPads and MacBooks.

Anticipated Production Trends for SoIC

TSMC forecasts production numbers for SoIC packaging to reach up to 20, 000 units by the close of 2025. Nevertheless, the company will maintain a focus on CoWoS until the market introduction of NVIDIA’s Rubin architecture, anticipated to occur between late 2025 and early 2026.

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