Tensor G5 Allegedly Utilizes TSMC’s Advanced 3nm ‘N3P’ Process; Google Outpaces Apple in Launching First Silicon on This Lithography

While Google has kept many details about the Tensor G5 under wraps, a series of leaks have suggested that this upcoming chipset would initially be mass-produced using TSMC’s second-generation 3nm technology, dubbed ‘N3E.’ However, a recent report indicates that Google may actually be ahead of its competitors, as the Tensor G5 is said to be fabricated on TSMC’s advanced 3nm ‘N3P’ technology, representing the latest generation of chip-making processes.

Revealing Details About the Tensor G5 and Its Advanced Manufacturing Process

As we approach the anticipated launch of the Pixel 10 series, more details about the Tensor G5 are expected to emerge. Significantly, Tom’s Hardware has claimed that this new System on Chip (SoC) utilizes TSMC’s 3nm N3P technology. Although it is unclear whether the outlet possesses exclusive information, Google has yet to officially affirm this, only noting that the Tensor G5 is built on a leading lithography node.

“We’ve made enhancements across Tensor G5, including an up to 60% more powerful TPU and 34% faster on average CPU, making your Pixel more responsive for everyday use, like browsing the web, and the latest AI features. Tensor G5 is designed in the leading 3 nm process node from TSMC — a manufacturing technology that allows us to pack more transistors into the chip so it’s more powerful and efficient.”

To provide some perspective, the 3nm N3P process is an optical refinement of the N3E node, promising a 5 percent performance increase without elevating power consumption. Furthermore, chipsets produced using this technology can achieve energy savings of 5-10%, extending battery life while reducing heat generation within the device’s internal components. However, readers should approach this information with caution until official confirmation is provided, and rest assured we will continue to offer updates as new information unfolds.

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