Rapidus’ 2nm “2HP” Fabrication Process to Rival TSMC’s N2 in Logic Density, Outperforming Intel’s 18A Significantly

Rapidus of Japan is gaining traction in the semiconductor industry with its innovative 2nm process. Recently, the firm released data revealing the logic density of its cutting-edge node, indicating that it stands alongside TSMC’s renowned N2 architecture.

Competitors in the Semiconductor Industry: Rapidus Takes on TSMC in the 2nm Race

In recent months, Rapidus has captured attention as Japan’s foremost semiconductor company, further bolstered by endorsements from major industry players like NVIDIA. The company’s new 2nm process, referred to as ‘2HP’, has been highlighted by @Kurnalsalts, who pointed out that its logic density competes directly with TSMC’s N2 and significantly exceeds Intel’s 18A density.

Raipidus share the data with 2nm（Named 2HP)so that，we can know the NEXT Gen process technology in Logic Density pic.twitter.com/sHsjJB3mn8

— Kurnal (@Kurnalsalts) August 31, 2025

The newly released data indicates that Rapidus’ 2HP achieves a substantial logic density of 237.31 MTr/mm², closely rivaling TSMC’s 236.17 MTr/mm². Analysis of the cell library used to attain this high density includes a High Density (HD) library featuring a cell height of 138 units on a G45 pitch. Both nodes aim for optimal logic density, implying that they likely possess comparable transistor counts upon their market debut.

In contrast, Intel’s 18A node boasts a lower density of 184.21 MTr/mm². This discrepancy largely arises from the benchmarking methods utilizing HD libraries. Moreover, Intel’s emphasis remains on performance-to-power metrics, which assumes precedence over merely achieving higher density. The 18A node is primarily oriented towards internal operations.

TSMC kicking off mass production of its 2nm process in Q4 2025 — TSMC’s 2nm Node is Progressing as Expected and Dominating the Market

Rapidus’ performance in achieving competitive density figures illustrates significant strides forward for the company in the semiconductor landscape. Notably, they utilize a unique approach with single-wafer front-end processing, allowing for targeted adjustments in production volume, ultimately leading to enhanced outcomes.

The anticipated 2nm Process Design Kit (PDK) from Rapidus is set to be available in the first quarter of 2026, and initial signs suggest that this new node could introduce robust advancements to the market.

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