Leak Reveals AMD 6th Gen EPYC Venice CPU Specs: Up to 8 CCDs with 96 “Classic” & 256 “Dense” Cores and 128 MB L3 Cache Per CCD

Recent leaks have emerged about AMD’s upcoming 6th Generation EPYC Venice CPUs, which are designed with new Zen 6 and Zen 6C core architectures and could feature a remarkable 256 cores.

AMD’s EPYC Venice CPUs: Up to 256 Cores on Zen 6 & Zen 6C Architectures

The buzz surrounding AMD’s 6th Gen EPYC Venice CPU lineup has intensified since the company confirmed that these processors will utilize TSMC’s cutting-edge 2nm process technology. Insights into these high-performance chips began surfacing in 2022, with a steady stream of updates recorded throughout 2023, building anticipation among industry stakeholders.

According to assertions from previous reports, the Venice CPUs will be available in two versions, echoing the configurations of the Zen 5 and Zen 4 series. These will comprise a standard Zen 6 variant and a more compact Zen 6C variant, both compatible with SP7 and SP8 sockets. The SP7 socket will cater to higher-end applications, while the SP8 socket will support entry-level servers. Notably, this platform will offer 16 and 12 channels of memory support.

AMD EPYC Venice CPUs — Image Source: Baidu Forums

Diving into the technical aspects, several specifications have surfaced via leaks on the Tieba Baidu forums. These leaks indicate a chip design featuring eight chiplets (CCDs)—four on each side—each housing 12 Zen 6 cores. The design includes several I/O die (IOD), enhancing the I/O functionalities for these server processors.

AMD EPYC Venice CPU CCD layout — Image Source: Baidu Forums

This configuration totals an impressive 96 cores and 192 threads, matching the core count of AMD’s current EPYC 9005 series based on the Zen 5 architecture. However, these new processors are rumored to include up to 128 MB of L3 cache per chiplet. While it remains unclear whether this cache allocation pertains to the Zen 6 or Zen 6C variants, the Zen 6C EPYC chips would maintain a significant 2 MB of L3 cache per core. For the EPYC 9006 series featuring the Zen 6 architecture, the expected specs are 96 cores and 192 threads supported by eight chiplets, whereas the Zen 6C models will scale up to 256 cores and 512 threads.

SP8: up to 128 Zen 6C cores with 128 MB per CCD (96 cores for Zen 6 models), 350-400w

SP7: up to 256 Zen 6C cores, ~600w https://t.co/CQodEenhBk

— Bionic_Squash (@SquashBionic) May 10, 2025

Further insights from Bionic_Squash suggest that the SP7 variants are anticipated to operate at a thermal design power (TDP) around 600W, an increase from the 400W typical of the Zen 5 architecture. In contrast, the SP8 models are projected to maintain a TDP range of 350-400W. Below are the summarized specifications:

EPYC 9006 “Venice”With Zen 6C: 256 Cores / 512 Threads / Up to 8 CCDs
EPYC 9005 “Turin”With Zen 5C: 192 Cores / 384 Threads / Up to 12 CCDs
EPYC 9006 “Venice”With Zen 5: 96 Cores / 192 Threads / Up to 8 CCDs
EPYC 9005 “Turin”With Zen 5: 96 Cores / 192 Threads / Up to 16 CCDs

This extensive lineup promises a diverse selection of WeUs for data centers and high-performance computing (HPC) customers. While these specifications are preliminary, the Zen 6 processors are expected to launch next year, paving the way for more detailed announcements from AMD in the near future.

Overview of AMD EPYC CPU Families:

Family Name	AMD EPYC Venice	AMD EPYC Turin-X	AMD EPYC Turin-Dense	AMD EPYC Turin	AMD EPYC Siena	AMD EPYC Bergamo	AMD EPYC Genoa-X	AMD EPYC Genoa	AMD EPYC Milan-X	AMD EPYC Milan	AMD EPYC Rome	AMD EPYC Naples
Family Branding	EPYC 9006	EPYC 9005	EPYC 9005	EPYC 9005	EPYC 8004	EPYC 9004	EPYC 9004	EPYC 9004	EPYC 7004	EPYC 7003	EPYC 7002	EPYC 7001
Family Launch	2026?	2025	2025	2024	2023	2023	2023	2022	2022	2021	2019	2017
CPU Architecture	It was 6	It was 5	Zen 5C	It was 5	It was 4	It was 4C.	Zen 4 V-Cache	It was 4	It was 3	It was 3	It was 2	It was 1
Process Node	2nm TSMC	4nm TSMC	3nm TSMC	4nm TSMC	5nm TSMC	4nm TSMC	5nm TSMC	5nm TSMC	7nm TSMC	7nm TSMC	7nm TSMC	14nm GloFo
Platform Name	SP7	SP5	SP5	SP5	SP6	SP5	SP5	SP5	SP3	SP3	SP3	SP3
Socket	TBD	LGA 6096 (SP5)	LGA 6096 (SP5)	LGA 6096	LGA 4844	LGA 6096	LGA 6096	LGA 6096	LGA 4094	LGA 4094	LGA 4094	LGA 4094
Max Core Count	256	192	128	128	64	128	96	96	64	64	64	32
Max Thread Count	512	384	256	256	128	256	192	192	128	128	128	64
Max L3 Cache	Up to 128 MB	1536 MB	384 MB	384 MB	256 MB	256 MB	1152 MB	384 MB	768 MB	256 MB	256 MB	64 MB
Chiplet Design	8 CCDs (1 CCX per CCD) + 2 IOD?	16 CCDs (1 CCX per CCD) + 1 IOD	12 CCDs (1 CCX per CCD) + 1 IOD	16 CCDs (1 CCX per CCD) + 1 IOD	8 CCDs (1 CCX per CCD) + 1 IOD	12 CCDs (1 CCX per CCD) + 1 IOD	12 CCDs (1 CCX per CCD) + 1 IOD	12 CCDs (1 CCX per CCD) + 1 IOD	8 CCDs (1 CCX per CCD) + 1 IOD	8 CCDs (1 CCX per CCD) + 1 IOD	8 CCDs (2 CCXs per CCD) + 1 IOD	4 CCDs (2 CCXs per CCD)
Memory Support	DDR5-XXXX?	DDR5-6000?	DDR5-6400	DDR5-6400	DDR5-5200	DDR5-5600	DDR5-4800	DDR5-4800	DDR4-3200	DDR4-3200	DDR4-3200	DDR4-2666
Memory Channels	16-Channel (SP7)	12 Channel (SP5)	12 Channel	12 Channel	6-Channel	12 Channel	12 Channel	12 Channel	8 Channel	8 Channel	8 Channel	8 Channel
PCIe Gen Support	TBD	TBD	128 PCIe Gen 5	128 PCIe Gen 5	96 Gen 5	128 Gen 5	128 Gen 5	128 Gen 5	128 Gen 4	128 Gen 4	128 Gen 4	64 Gen 3
TDP (Max)	~600W	500W (cTDP 600W)	500W (cTDP 450-500W)	400W (cDP 320-400W)	70-225W	320W (cTDP 400W)	400W	400W	280W	280W	280W	200W