Intel’s 18A-P: Achieving a 9% Speed Increase, 50% Improved Thermal Conductivity, and Enhanced Skew Corner Designs to Attract Foundry Clients
Intel is currently advancing its 18A process technology, particularly the 18A-P variant, which is designed to enhance performance and power efficiency for external customers while preparing for significant volume increases in Panther Lake production.
The 18A-P Process Node: Key Advantages for External Customers
As the company gears up for the VLSI conference slated for June, it has shared preliminary insights into 18A-P, highlighting advancements that improve its competitiveness in the foundry market. Intel positions the VLSI webpage as a resource for further updates:
Intel 18A-P is a performance-enhanced, RibbonFET gate-all-around (GAA) transistor technology with backside power delivery through PowerVia. Relative to Intel 18A, Intel 18A-P offers over 18% lower power at iso-performance or over 9% performance gain at iso-power. This improvement is achieved through newly added technology features, transistor performance enhancement, interconnect enhancement, and design technology co-optimizations (DTCO).
Added features in Intel 18A-P include additional logic VT pairs, skew corner tightening, new low-power devices in both high-density (HD) and high-performance (HP) libraries, and performance-improved HP devices in both libraries. In addition, Intel 18A-P offers reduced thermal resistance for improved heat conduction.
Image Source: Dr. Ian Cutress (via VLSI)
Intel’s 18A-P technology promises a notable ~9% increase in performance at equivalent power levels or an ~18% decrease in power consumption for the same performance compared to the 18A process. This positions the 18A-P as a refined version of its predecessor, poised to meet the increasing demands of modern semiconductor applications.
Key enhancements in the feature list indicate continuity in Library Height and Contacted Poly Pitch, while notable upgrades include the introduction of new low and high power transistors, an increase in the number of logic VT pairs from four to five or more, and the implementation of tighter skew corners to optimize performance variability.
5+ pairs of Logic VTs (New Logic VT between ULVT and LVT) Lower ULVT
Skew Corners
—
—
~30% tightening in skew corners
Interconnect RC
—
Intel 18A Base Process
V0-V2 R reduction M2-M4 jogs
Thermals
—
—
Improved thermal conductivity by 50%
Among the most substantial advancements is the 50% enhancement in thermal conductivity. While this does not imply that the chips will operate at cooler temperatures, it signifies improved heat transfer capabilities, which is crucial for maintaining performance under load.
Intel has also visualized the performance gains of the 18A-P technology through plots comparing Ring Oscillator Frequencies against Normalized Capacitance, showcasing the superior speed and power efficiencies delivered by the new process.
Label
Color/Shape
Meaning
W1
Green dots
New device with high-performance contacts — the best-performing cluster with highest ring oscillator frequency.
W2
Dark squares + green
Intermediate step showing improved mobility (electrons move more easily through the channel).
W3
Dark squares
Further iteration, higher performance.
W3P
Blue dots
New device with high-performance contacts — the best-performing cluster with highest ring oscillator frequency.
The 18A-P process node signifies not merely a marginal performance improvement but includes significant technical advancements designed to engage new customers effectively. As both the 18A-P and 14A PDK mature, analysts are optimistic about Intel’s prospects of building stronger customer relationships within its foundry operations.
For more details, refer to the insights shared by Dr. Ian Cutress.
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