Exploring AMD RDNA 4: Modular SoC Design and Configurability for Compact GPUs Like Navi 44, Featuring Memory and Bandwidth Efficiency

Exploring AMD RDNA 4: Modular SoC Design and Configurability for Compact GPUs Like Navi 44, Featuring Memory and Bandwidth Efficiency

AMD has elaborated on its RDNA 4 GPU architecture and the innovative Modular SoC design, introducing advanced memory and bandwidth compression strategies that enhance performance.

Revisiting AMD’s RDNA 4 GPU Architecture and Modular SoC Innovations at Hot Chips 2025

Earlier in February, AMD launched its comprehensive overview of the RDNA 4 architecture. Recent presentations at Hot Chips 2025 provide further insights, particularly regarding the modular nature of this chip designed for versatile applications.

One notable aspect AMD addressed is the incorporation of LPDDR memory for its lower-tier RDNA 4 GPU SoCs. While LPDDR memory is recognized for its lower power consumption, AMD indicates that it lacks the necessary bandwidth. As a result, the physical footprint of the chip increases, making LPDDR unsuitable for high-performance graphics cards.

AMD RDNA 4 Radeon 9000 GPU launch at Hot Chips 2025 event, detailed view of the chip.
RDNA 4 Vision: Optimized GPU architecture for gaming with enhanced performance and raytracing.
Diagram detailing AMD Radeon RX 9070 XT features, emphasizing rendering, ray tracing, and memory.
AMD RDNA 4: Enhanced game streaming, low latency video, and FreeSync optimization details.
RDNA 4 Raytracing Architecture: Enhanced Accelerators and Optimized BVH Memory Chart
Deeper Dive into Oriented Bounding Boxes and Traversal Optimization with Heatmap Comparison
Out-of-order memory queues improve RDNA 4 GPU performance by handling requests efficiently.
RDNA 4 architecture enhances ray traversal performance with multiple optimization factors.
Graph comparing RDNA 3 static vs RDNA 4 dynamic register allocation in shaders.
RDNA 4 AI capabilities for gaming and content creation, showcasing enhanced efficiency and performance.
Comparison of Raytracing and Pathtracing methods with diagrams and key differences explained.
Cozy workshop with robots and tech tools illuminated by colorful string lights, showcasing RDNA 4 Path Tracing.

When asked about the reduced memory bandwidth in comparison to RDNA 3, AMD explained that memory bandwidth efficiency is highly dependent on specific workloads. The tuning of the RDNA 4 graphics architecture has led to a significant decrease in bandwidth requirements without compromising performance.

During the Hot Chips presentation, AMD emphasized the flexibility of its Modular SoC architecture. The RDNA 4 model has been designed as a versatile chip that enables diverse configurations for various Radeon products. Laks Pappu, AMD’s SoC Architect, highlighted the modular capabilities, which are expected to extend to future RDNA 5 and UDNA generations.

RDNA 4 SoC architecture presentation slide with abstract geometric design and AMD logo.

The architecture utilizes a Data Flow chart that features multiple Shader Engines integrated within the Navi 4X SoCs, where each Shader Engine comprises several Work Group Processors (WGPs) equipped with dual Compute Units.

The communication network among these components is facilitated by a GL2 Cache on the GPU side, connecting to the improved Infinity Fabric, a coherent interconnect mechanism. This modular design includes several Coherent Stations alongside the LLC and dual-channel memory controllers linked directly to DRAM (GDDR6) on the PCB. Notably, the Infinity Fabric operates at 1KB per clock cycle with a frequency range from 1.5 to 2.5 GHz.

SOC architecture data flow showing shader engines and Infinity Fabric connections.

Focusing on the Modular SoC design, AMD articulated its potential to create smaller SoCs efficiently. A designated red line in AMD’s diagrams illustrates the modular chip segmentation and its scalability across various WeUs. For instance, the configuration below the red line indicates a Navi 44 design featuring two Shader Engines and four GDDR6 memory controllers, thereby allowing adjustments in both directions—scaling up or down based on requirements.

Modular SoC architecture overview with security features and component layout, highlighting RDNA4 chip.

The modular architecture not only enables the addition of more Shader Engines, L3 caches, Infinity Fabric interconnects, and GDDR memory controllers for higher-end WeUs, like the Navi 48 found in the RX 9070 XT graphics card, but also enhances security levels. It allows for controlled access and different privilege levels for security management, power regulation, and micro-controller functions. RAS (Reliability, Availability, and Serviceability) features are embedded across various components of this modular die.

Central Compression/Decompression Diagram for SoC Architecture Optimization

AMD also highlighted its advanced RDNA 4 SoC compression and decompression algorithms. These new methodologies are said to yield a 15% performance boost in certain raster workloads while achieving a 25% reduction in fabric bandwidth. This efficiency not only lowers power consumption but also minimizes the software’s need to handle compression, as this functionality is inherently managed within the hardware.

Overview of SOC RDNA 4 product SKUs, specs for Radeon RX 9070 and 9060 series GPUs.

AMD reiterated the flexible configurability inherent in its Modular SoC design, enabling the creation of diverse product WeUs to meet evolving market demands. The available configurations are structured into four harvest levels:

  • SEHarvest
  • WGP Harvest
  • Asymmetric Harvest (potentially incorporating weighted pixel and compute shader distributions)
  • Memory Device Harvest (single device granularity and 64-bit granularity)
AMD Radeon RX 9070 XT GPU details with RDNA 4 features for gaming and creation.

Currently, AMD showcases four Navi 48 WeUs and three Navi 44 WeUs, with the scalable Modular SoC nature of RDNA 4 paving the way for even more configurations in the future.

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