A pioneering chip research facility in Barcelona has unveiled a new computing architecture that integrates RISC-V technology with Intel’s processing capabilities. This development signifies a significant stride toward achieving a “sovereign infrastructure”in Europe.
Innovative Ternary Architectures in BZL’s Latest Chip Enhances Workload Efficiency
The discourse regarding Europe’s position in the AI landscape is often fraught with questions, especially considering the scarcity of “independent” initiatives contributing to the global computing race. While we set aside this broader discussion for now, the Barcelona Zettascale Lab (BZL) has made headlines by completing an experimental iteration of its Cinco Ranch TC1 chip. According to a recent report from the lab, this marks a pivotal moment in Europe, as it introduces a computing architecture specifically developed for “sovereign supercomputing technologies.”
– Miquel Moreto
Exploring the technical aspects further, it has been disclosed that the TC1 chip operates at a frequency of 1.25 GHz and features a unique three-core architecture designed for enhanced performance in targeted applications. The chip employs an open-source RISC-V architecture and integrates three distinct RISC-V cores on a single chip die, each optimized for specific types of workloads. These are the Sargantana, Lagarto Ka, and Lagarto Ox microarchitectures, which focus on efficiency, vector processing, and scalar workloads, respectively.
The TC1 chip stands out as a novel tenary heterogeneous architecture, deviating from the traditional core designs that typically follow a standard performance/energy core distribution. This innovative approach aims to finely tune the handling of varied workloads, potentially allowing BZL’s technology to exceed the performance of mainstream solutions on specific computing tasks, although definitive conclusions cannot yet be drawn.
Importantly, the TC1 chip’s development was undertaken in collaboration with Intel. It utilizes the Intel 3 process, and BZL has conducted extensive evaluation tests in tandem with TSMC’s N7 node, confirming the “quality, feasibility, and robustness of the RTL code.”While BZL is still in the early stages of creating a computing solution that is ready for widespread adoption, this advancement marks a crucial first step toward realizing independent infrastructure solutions in Europe.
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