Intel’s 18A fabrication process marks a pivotal advancement for the company’s foundry division, especially highlighted by the successful launch of its Panther Lake lineup. However, the broader adoption of this new technology remains constrained at the moment.
Intel’s PowerVia Technology Sets the Stage for Future Client Commitments, But Not Immediately
For several years, Intel Foundry has encountered challenges in securing customer commitments. Despite these hurdles, the division has diligently focused on the development of its 18A process, originally initiated under the leadership of former CEO Pat Gelsinger. The recent success of integrating this process into the Panther Lake product line has sparked optimism among experts regarding Intel Foundry’s trajectory. Nonetheless, concerns are mounting regarding the potential for external volume production using the 18A process, primarily due to fundamental issues such as the Backside Power Delivery Network (BSPDN).
But what exactly is BSPDN, and why is it viewed as an obstacle to widespread adoption? In essence, the term refers to Intel’s innovative approach to power delivery in its 18A node, which shifts power and ground routing to the back of the chip. This design creates additional space on the front for enhanced data transmission. While the technical specifics may be complex, the fundamental takeaway is that Intel’s implementation of BSPDN significantly redefines conventional power delivery methodologies in chip manufacturing.
According to TechInsights, while the backside power delivery method represents a forward-thinking strategy for Intel, it may have been introduced prematurely. The major hurdle for customers lies in the necessity to completely overhaul existing physical design practices, as BSPDN diverges from traditional logic norms. The 18A process integrates groundbreaking technologies such as PowerVia and RibbonFET within a single framework, compelling customers to navigate a lengthy and complex integration process.
While BSP offers long-term benefits in power integrity and scaling efficiency, it also represents a structural departure from conventional design methodologies. Adoption requires substantial design re-architecture, limiting immediate portability for customers accustomed to frontside power delivery. In contrast, competing foundries are expected to delay BSP implementation until later in the decade, with broader industry adoption anticipated around 2027.
– TechInsights
Despite these challenges, Intel’s pioneering of PowerVia gives it a significant advantage over rivals like TSMC, which anticipates rolling out a comparable solution with its A16 process—set to debut nearly two generations later. The successful ramp-up of the Panther Lake family indicates that Intel is using BSPDN technology to enhance power efficiency and computational capacity. This is likely to position the upcoming 18A-P process, a variant of the original 18A, for greater success.
It will be fascinating to observe how Intel and its prospective clients manage the integration of the 18A family of products. However, Intel may find it strategically prudent to target the lower 14A-class nodes for external customer adoption, as the industry shifts towards new transistor architectures and advanced power delivery strategies.