Apple to Leverage TSMC’s Advanced WMCM and SoIC Packaging for A20 and Server Chips, Projecting Monthly Production of 10,000 Wafers by 2026

Apple to Leverage TSMC’s Advanced WMCM and SoIC Packaging for A20 and Server Chips, Projecting Monthly Production of 10,000 Wafers by 2026

Apple is poised to revolutionize the semiconductor landscape with the introduction of its first 2nm chipsets in 2024, likely debuting in the much-anticipated iPhone 18 series under the names A20 and A20 Pro. This advancement not only highlights TSMC’s cutting-edge manufacturing capabilities but also showcases Apple’s strategic shift toward two innovative packaging techniques anticipated to roll out by 2026.

New Manufacturing Facilities and Packaging Technologies

According to recent reports, TSMC will establish two dedicated production plants for Apple, identified as P1 and AP6, to facilitate the manufacturing of the A20 series and associated server chips. This initiative underscores the collaboration between the tech giant and its semiconductor partner, emphasizing the commitment to maintaining processing power and efficiency in their products.

The WMCM (Wafer-Level Multi-Chip Module) technology, designated for the A20 and A20 Pro, promises to retain the compact footprint of these chipsets. With the flexibility to integrate several components—including CPUs, GPUs, and memory—at the wafer level prior to slicing them into individual units, this method will significantly enhance Apple’s ability to produce smaller, yet more powerful System on Chips (SoCs).

DigiTimes reports that TSMC’s Chiayi P1 facility is set to launch a specialized production line with an ambitious goal of processing 10, 000 wafers each month. While the current focus is on Apple, there is no indication that other companies will utilize WMCM packaging at this time. Additionally, Apple’s strategy includes leveraging TSMC’s SoIC (System on Integrated Chips) packaging for its dedicated server chips. This technology allows for two advanced chips to be stacked directly, enhancing connectivity and performance.

This advanced stacking technique facilitates ultra-dense interconnections, which translates to lower latency, improved performance, and heightened efficiency. Previously, TSMC and Apple have explored the potential of this innovative packaging, raising expectations for its debut in upcoming products like the M5 Pro and M5 Max. The mass production of SoIC server chips is slated to take place at TSMC’s Zhunan AP6 facility, with an anticipated ramp-up in manufacturing by the close of 2025.

For further details, you can read the full report on DigiTimes.

Additionally, you can find more insights and images in this article from Wccftech.

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