Apple Boosts SoIC Production Capacity at TSMC for Upcoming Baltra ASIC, M5 Pro/Max, and M6 Pro/Max Chips, Reserving 60K Wafers for 2027

Apple Boosts SoIC Production Capacity at TSMC for Upcoming Baltra ASIC, M5 Pro/Max, and M6 Pro/Max Chips, Reserving 60K Wafers for 2027

Apple is steadily laying the foundation for its next-generation custom chips, notably a highly anticipated server chip referred to as Baltra, according to a recent analysis by investment firm Morgan Stanley.

Apple Expands TSMC’s SoIC Reservation Slots in Anticipation of Baltra ASIC

In a new report, Morgan Stanley highlights that Apple is “ramping up“its activities related to TSMC’s SoIC (System on Integrated Circuit) technology:

“Apple is materially ramping SoIC capacity at TSMC, pointing to a major push in Apple silicon for AI servers. TSMC (covered by Charlie Chan) is expanding its SoIC capacity, with Apple placing orders equivalent to 36K wafers in CY26 and 60K wafers in CY27.”

The analysis reveals that Apple has secured a SoIC capacity of 36, 000 wafers for 2026 and plans to increase this to 60, 000 wafers by 2027.

Understanding SoIC Technology

For those unfamiliar, SoIC is an advanced 3D packaging technology that enables the stacking of multiple chips both horizontally and vertically onto a single system-on-a-chip (SoC).This innovative approach allows for the integration of various components such as CPUs, GPUs, and Neural Engines into a single package, thereby enhancing flexibility and performance. For instance, creators can opt to outfit the M5 Pro or M5 Max chips with a more substantial number of GPU cores as per their requirements.

Notably, while a portion of this new capacity will be allocated for the upcoming M5 Pro and M5 Max chips, as well as the M6 Pro and M6 Max slated for release next year, the majority seems to be earmarked for the Baltra ASIC, expected to launch in 2027.

Features of Baltra ASIC

Apple’s custom AI server chip, Baltra, is anticipated to leverage TSMC’s advanced 3nm N3E manufacturing process and will utilize several specialized chiplets, each designed for distinct functions. This modular architecture allows Apple to integrate these chiplets into a unified system while maintaining control over intercommunication processes, aided by Broadcom. This design strategy ensures that Apple can obscure the intricate layout of the AI ASIC from even its partners like Broadcom.

Looking ahead, Apple aims to transition Baltra’s production in-house, diminishing Broadcom’s role in chip design. This move is evidenced by Apple’s recent acquisition of T-glass samples from Samsung’s SEMCO, further solidifying its intent to innovate independently.

For further insights, you can read the full article here.

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