AMD Instinct MI400 Leaked in Recent Updates: Expected to Have Up to 8 Chiplets on Dual Interposer Dies

AMD Instinct MI400 Leaked in Recent Updates: Expected to Have Up to 8 Chiplets on Dual Interposer Dies

AMD’s upcoming Instinct MI400 accelerators are set to introduce a transformative architecture featuring dedicated interposer dies that can support up to 8 chiplets. This groundbreaking innovation was recently highlighted in various development patches.

Introducing the AMD Instinct MI400 Accelerators: Key Features Unveiled

The next generation of AMD’s Instinct accelerators, the MI400, promises a significant shift in design that incorporates advanced tiles. While AMD continues to finalize the MI350, with a planned release this year, preliminary insights into the MI400, scheduled for launch in 2026, are emerging.

Recent data leaks have revealed intriguing details regarding the MI400’s architecture. Although AMD has yet to officially disclose comprehensive specifications, recent patches provide a tantalizing glimpse into what the new accelerators will entail.

Notably reviewed by Coelacanth Dream, updates posted on the Free Desktop indicate that the MI400 will now include up to Four XCDs (Accelerated Compute Dies), a substantial upgrade from the previous model’s two XCDs per Active Interposer Die (AID).Additionally, the MI400 will implement two AIDs along with distinct Multimedia and I/O dies.

MI400 Patch
Image Source: FreeDesktop.org

Each AID will feature a dedicated MID tile designed to optimize communication between compute units and I/O interfaces, marking a noteworthy advancement over earlier models. AMD’s MI350 already utilizes Infinity Fabric for inter-die communication; however, the MI400’s enhancements are aimed specifically at meeting the demands of large-scale AI training and inference applications. This new architecture, likely to be rebranded as UDNA under AMD’s strategy to unify RDNA and CDNA technologies, showcases AMD’s commitment to innovation.

AMD Instinct MI325X
Image Source: AMD

In parallel, AMD is preparing to unveil the MI350 accelerators employing the CDNA 4 architecture this year. These accelerators are set to deliver remarkable improvements over the MI300 series, featuring a cutting-edge 3nm process node and enhanced energy efficiency. Expectations include up to a 35-fold increase in AI inference capabilities when compared to the MI300. Details regarding the performance of the MI400 have yet to be disclosed, making the community eagerly anticipate upcoming announcements.

Specifications Overview: AMD Instinct AI Accelerators

Accelerator Name AMD Instinct MI400 AMD Instinct MI350X AMD Instinct MI325X AMD Instinct MI300X AMD Instinct MI250X
GPU Architecture CDNA Next / UDNA CDNA 4 Aqua Vanjaram (CDNA 3) Aqua Vanjaram (CDNA 3) Aldebaran (CDNA 2)
GPU Process Node TBD 3nm 5nm+6nm 5nm+6nm 6 nm
XCDs (Chiplets) 8 (MCM) 8 (MCM) 8 (MCM) 8 (MCM) 2 (MCM) 1 (Per Die)
GPU Cores TBD TBD 19, 456 19, 456 14, 080
GPU Clock Speed TBD TBD 2100 MHz 2100 MHz 1700 MHz
INT8 Compute TBD TBD 2614 TOPS 2614 TOPS 383 TOPs
FP6/FP4 Compute TBD 9.2 PFLOPs N/A N/A N/A
FP8 Compute TBD 4.6 PFLOPs 2.6 PFLOPs 2.6 PFLOPs N/A
FP16 Compute TBD 2.3 PFLOPs 1.3 PFLOPs 1.3 PFLOPs 383 TFLOPs
FP32 Compute TBD TBD 163.4 TFLOPs 163.4 TFLOPs 95.7 TFLOPs
FP64 Compute TBD TBD 81.7 TFLOPs 81.7 TFLOPs 47.9 TFLOPs
VRAM TBD 288 HBM3e 256 GB HBM3e 192GB HBM3 128 GB HBM2e
Infinity Cache TBD TBD 256 MB 256 MB N/A
Memory Clock TBD 8.0 Gbps? 5.9 Gbps 5.2 Gbps 3.2 Gbps
Memory Bus TBD 8192-bit 8192-bit 8192-bit 8192-bit
Memory Bandwidth TBD 8TB/s 6.0 TB/s 5.3 TB/s 3.2 TB/s
Form Factor TBD OAM OAM OAM OAM
Cooling TBD Passive Cooling Passive Cooling Passive Cooling Passive Cooling
TDP (Max) TBD TBD 1000W 750W 560W

For detailed updates, refer to the insights shared by Videocardz.

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