AMD Announces Next-Gen EPYC Venice “Zen 6” CPUs as First HPC Product Utilizing TSMC’s 2nm “N2” Technology, 5th Gen EPYC Validation Completed at TSMC Arizona

AMD has officially revealed that its upcoming EPYC Venice CPUs, featuring the latest Zen 6 architecture, will be fabricated using TSMC’s state-of-the-art 2nm process node known as N2.

Strategic Partnership: AMD & TSMC Unveil 6th Gen EPYC Venice CPUs on 2nm N2 Process

In a significant announcement, AMD has reinforced its long-standing collaboration with TSMC, positioning itself at the forefront of next-generation EPYC CPU manufacturing through cutting-edge technology.

According to a press release, the forthcoming EPYC CPUs, dubbed 6th Gen Venice, will be the industry’s inaugural HPC products utilizing TSMC’s advanced N2 process technology, also referred to as 2nm. This process will utilize groundbreaking NanoSheet technology, ensuring that these processors are optimized in tandem with the innovative Zen 6 and Zen 6C architecture.

In the same announcement, AMD revealed the successful validation of its 5th Gen EPYC processors at TSMC’s Fab 21 in Arizona. This achievement underscores the United States’ commitment to enhancing domestic chip fabrication and production.

Press Release Highlights:

AMD disclosed that its next-generation AMD EPYC processor, codenamed “Venice, ” is the first HPC product in the industry to be taped out and introduced using TSMC’s advanced 2nm (N2) process technology. This accomplishment emphasizes the strength of the partnership between AMD and TSMC in optimizing new design architectures alongside the latest process technologies. Further, the “Venice” processors are set to launch next year as a pivotal advancement in AMD’s data center CPU roadmap.

Dr. Lisa Su, chair and CEO of AMD, stated: “TSMC has been an invaluable partner over the years, and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently produce leading-edge products that redefine high-performance computing. Our position as a lead HPC customer for TSMC’s N2 process and TSMC Arizona Fab 21 exemplifies our commitment to driving innovation and delivering the groundbreaking technologies that will shape the future of computing.”

Dr. C.C. Wei, TSMC Chairman and CEO, added: “We are thrilled to have AMD as a lead HPC customer for our advanced 2nm (N2) process technology and TSMC Arizona fabrication facility. Through our partnership, we are achieving significant technological advancements that enhance performance, power efficiency, and manufacturing yields for high-performance silicon. We look forward to our continued collaboration with AMD to usher in the next era of computing.”

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